fpga
for hardware engineers, FPGA developers
Why this scored 0
every term, weightedIts fastest-moving item, measured against the pace of its own source
Whether that velocity is itself speeding up, as a per-hour rate
How many independent communities its own items come from
Decays to zero over 14 days, counted from when we first saw it
Subtracted once something is big and old — sized by its biggest item, aged from when we first saw it
Weights are hand-tuned, not learned — we're calibrating them against realized trends as history accumulates. On an entity's first sighting there's no previous reading to compare against, so acceleration starts from a neutral prior rather than a measurement, and velocity falls back to engagement over its whole lifetime until a second reading exists. Full methodology
Signal history
7-day window (free)The evidence
The live items this entity's score aggregates — every community independently talking about it right now. This is the corroboration, shown, not claimed.
- 116
Recreating Voodoo Graphics and a Late-1990s Gaming PC on an FPGA
Recreating a classic 3dfx card on FPGA shows retro hardware prototyping potential. · for hardware engineers, FPGA developers
hackernewsSteadyhardware40d ago - 214
LisaFPGA: the Apple Lisa computer implemented inside an FPGA
lobstersSteady109d ago - 310
NIFA: Nonlinear IMC enhanced FPGA for efficient ML inference
Efficient ML inference · for hardware engineers
arxivSteady 2 · fpgahardware101d ago - 49
Bit-Accurate FPGA Evaluation of Learned Feature Gating in a Fixed-Point Fourier-Feature Automatic Modulation Classifier
FPGA evaluation of feature gating · for hardware engineers
arxivSteadyhardware90d ago - 55
RISC-V return address corruption bug
RISC-V return address bug · for fpga devs
stackoverflowSteadyhardware102d ago